1. Field of the Invention
The present invention relates to a data writing method for a flash memory and particularly to a data writing method capable of effectively ensure that data is correctly written into a flash memory, and a flash memory controller and a flash memory storage system using the same.
2. Description of Related Art
Flash memory is the most adaptable memories to be applied in portable electronic products which are supplied power by batteries due to its data non-volatility, low power consumption, small volume, and non-mechanical structure. For example, a solid state drive (SSD) is a storage device that uses a NAND flash memory as its storage medium, and which has been broadly used in notebook computes as the main storage device.
A flash memory of a flash memory storage device has a plurality of physical blocks, and each physical block has a plurality of physical pages, wherein data must be written into a physical block according to the sequence of the physical pages in the physical block. Additionally, a flash memory may be classified into two types of NAND flash memory, a Single Level Cell (SLC) NAND flash memory and a Multi Level Cell (MLC) NAND flash memory, according to the number of bits that each memory cell thereof is capable of storing. In the SLC NAND flash memory, because an electric charge in one memory cell is only identified using one level, whether the bit stored in one memory cell represents ‘1’ or ‘0’ is thereby identified. Therefore, each memory cell only can store one bit of data.
Along with the improvement of flash memory manufacture processes, the MLC NAND flash memory has developed. To be specific, an electric charge in one memory cell can be identified using a plurality of levels in the MLC NAND flash memory. Therefore, one memory cell may store multiple bits of data in the MLC NAND flash memory. Accordingly, for the same number of memory cells, the number of pages in an MLC NAND flash memory is a multiple of the number of pages in an SLC NAND flash memory.
In particular, because one memory cell may stores multi-bits of data in the MLC NAND flash memory, the program for the physical blocks of the MLC NAND flash memory will include a plurality of phases. Taking a 2 level cell NAND flash memory as an example, the physical blocks thereof are programmed in a first phase and a second phase. The first phase is the programming of a lower page, and the physical property of the programming of the lower page is similar to the physical property of the programming of the SLC NAND flash memory. After the first phase is completed, the programming of an upper page may be executed (i.e. the second phase), wherein the speed of programming the lower page is faster than that of programming the upper page. Similarly, in an 8 level cell or a 16 level cell, each memory cell contains more pages and accordingly is programmed in more phases.
In the MLC NAND flash memory the programming of the upper page may be coupling with the programming of the lower page, therefore the reliability of the MLC NAND flash memory is lower than the SLC NAND flash memory. That is, the probability of occurring writing errors in the MLC NAND flash memory is higher than that in the SLC NAND flash memory. In particular, when one memory cell can store more bits of data in the MLC NAND flash memory, the probability of writing errors becomes higher. Thereof, how to ensure that data is correctly written into a flash memory is one of the major subjects in the industry.
Nothing herein should be construed as an admission of knowledge in the prior art of any portion of the present invention. Furthermore, citation or identification of any document in this application is not an admission that such document is available as prior art to the present invention, or that any reference forms a part of the common general knowledge in the art.